JPS5878455A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5878455A
JPS5878455A JP56160546A JP16054681A JPS5878455A JP S5878455 A JPS5878455 A JP S5878455A JP 56160546 A JP56160546 A JP 56160546A JP 16054681 A JP16054681 A JP 16054681A JP S5878455 A JPS5878455 A JP S5878455A
Authority
JP
Japan
Prior art keywords
electrode
film
silicon film
single crystal
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56160546A
Other languages
English (en)
Japanese (ja)
Other versions
JPH02864B2 (en]
Inventor
Yasuaki Hokari
穂苅 泰明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56160546A priority Critical patent/JPS5878455A/ja
Publication of JPS5878455A publication Critical patent/JPS5878455A/ja
Publication of JPH02864B2 publication Critical patent/JPH02864B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0221Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H10D86/0223Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
    • H10D86/0227Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials using structural arrangements to control crystal growth, e.g. placement of grain filters
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices
    • H10D88/01Manufacture or treatment

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Recrystallisation Techniques (AREA)
JP56160546A 1981-10-08 1981-10-08 半導体装置の製造方法 Granted JPS5878455A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56160546A JPS5878455A (ja) 1981-10-08 1981-10-08 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56160546A JPS5878455A (ja) 1981-10-08 1981-10-08 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5878455A true JPS5878455A (ja) 1983-05-12
JPH02864B2 JPH02864B2 (en]) 1990-01-09

Family

ID=15717317

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56160546A Granted JPS5878455A (ja) 1981-10-08 1981-10-08 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5878455A (en])

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6054425A (ja) * 1983-09-05 1985-03-28 Agency Of Ind Science & Technol 半導体装置の製造方法
JPS60200564A (ja) * 1984-03-24 1985-10-11 Mitsubishi Electric Corp 薄膜半導体素子集積回路装置
JPS6163018A (ja) * 1984-09-04 1986-04-01 Agency Of Ind Science & Technol Si薄膜結晶層の製造方法
JPS61234088A (ja) * 1985-04-10 1986-10-18 Agency Of Ind Science & Technol レ−ザ光照射装置
US5759878A (en) * 1990-10-16 1998-06-02 Agency Of Industrial Science And Technology Method of fabricating semiconductor device having epitaxially grown semiconductor single crystal film
EP2068366A3 (en) * 2007-12-03 2015-07-01 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6054425A (ja) * 1983-09-05 1985-03-28 Agency Of Ind Science & Technol 半導体装置の製造方法
JPS60200564A (ja) * 1984-03-24 1985-10-11 Mitsubishi Electric Corp 薄膜半導体素子集積回路装置
JPS6163018A (ja) * 1984-09-04 1986-04-01 Agency Of Ind Science & Technol Si薄膜結晶層の製造方法
JPS61234088A (ja) * 1985-04-10 1986-10-18 Agency Of Ind Science & Technol レ−ザ光照射装置
US5759878A (en) * 1990-10-16 1998-06-02 Agency Of Industrial Science And Technology Method of fabricating semiconductor device having epitaxially grown semiconductor single crystal film
US5926699A (en) * 1990-10-16 1999-07-20 Agency Of Industrial Science And Technology Method of fabricating semiconductor device having stacked layer substrate
EP2068366A3 (en) * 2007-12-03 2015-07-01 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JPH02864B2 (en]) 1990-01-09

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